XC3S400A-4FGG400C

Product Summary

The XC3S400A-4FGG400C is a member of Spartan-3A family. The Spartan-3A family of Field-Programmable Gate Arrays (FPGAs) solves the design challenges in most high-volume, cost-sensitive, I/O-intensive electronic applications. The XC3S400A-4FGG400C is part of the Extended Spartan-3A family, which also include the non-volatile Spartan-3AN and the higher density Spartan-3A DSP FPGAs. The XC3S400A-4FGG400C builds on the success of the earlier Spartan-3E and Spartan-3 FPGA families. New features improve system performance and reduce the cost of configuration. These Spartan-3A family enhancements, combined with proven 90 nm process technology, deliver more functionality and bandwidth per dollar than ever before, setting the new standard in the programmable logic industry. The XC3S400A-4FGG400C family is a superior alternative to mask programmed ASICs. FPGAs avoid the high initial cost, lengthy development cycles, and the inherent inflexibility of conventional ASICs, and permit field design upgrades.

Parametrics

XC3S400A-4FGG400C absolute maximum ratings: (1)VCCINT, Internal supply voltage: –0.5 to 1.32 V; (2)VCCAUX, Auxiliary supply voltage: –0.5 to 3.00 V; (3)VCCO, Output driver supply voltage: –0.5 to 3.75 V; (4)VREF, Input reference voltage: –0.5 to VCCO+0.5 V; (5)IIK, Input clamp current per I/O pin,–0.5 V < VIN < (VCCO + 0.5 V): ±100 mA; (6)VESD, Electrostatic Discharge Voltage: Human body model: ±2000 V; (7)Charged device model: ±500 V; Machine model: ±200 V; (8)TJ, Junction temperature: 125℃; (9)TSTG, Storage temperature: –65 to 150℃.

Features

XC3S400A-4FGG400C features: (1)Very low cost, high-performance logic solution for high-volume, cost-conscious applications; (2)Dual-range VCCAUX supply simplifies 3.3V-only design; (3)Suspend, Hibernate modes reduce system power; (4)Multi-voltage, multi-standard SelectIO interface pins; (5)Abundant, flexible logic resources; (6)Hierarchical SelectRAMmemory architecture; (7)Up to eight Digital Clock Managers (DCMs); (8)Eight low-skew global clock networks, eight additional clocks per half device, plus abundant low-skew routing; (9)Configuration interface to industry-standard PROMs; (10)Complete Xilinx ISEand WebPACKdevelopment; (11)system software support plus Spartan-3A Starter Kit; (12)MicroBlaze and PicoBlaze embedded processors; (13)Low-cost QFP and BGA packaging, Pb-free options; (14)XA Automotive version available.

Diagrams